Silicon Electrical Engineering Design Summer Analyst - Technology Analyst Development Program

Job Description

Our Silicon Design group is a diverse team of world class silicon engineers. We have 100+ years of cumulative hands-on experience in architecture, logic design, verification, physical design, emulation and firmware. We use the latest silicon technologies and processes to help our clients create well-designed solutions to highly complex challenges. We are designing and developing next-generation, high performance SoCs, supporting our clients in their drive to deliver their product vision to their users. We are involved in all aspects of chip design from definition and architecture through to verification and signoff. Accenture engineers are true “Silicon to SW” Partners, allowing a new breed of companies in the semiconductor ecosystem to innovate in an unparalleled time to market.

Your Role

There is never a typical day at Accenture, but that’s why people love it here! Unleash your skills and transform the world around you. In this role you will assist in designing, implementing, and supporting next-generation SOC for a variety of research level projects. Many of these products actively push the boundary of the current state of the art in widely varying applications, offering an excellent opportunity for the right candidate to both hone your skills, as well as develop entirely new perspectives well out beyond the horizon.

 Your specific responsibilities will vary based on your alignment, but a typical day may include:  

• Develop test plans, tests, and verification infrastructure for verifying RTL design blocks at IP/Sub-System/SoC levels.
• Build verification testbench environment using SV/UVM methodology/C language/Python/YAML
• Build reusable bus functional models, monitors, checkers and scoreboards
• Drive coverage driven verification closure
• Verify various protocol functionalities through System Verilog Assertions (SVA)
• Regression triage.
• Work with architects, designers, and post-silicon teams.
• Working with cross functional teams (DV/Arch/Design/FW) to identify coverage scope
• Working knowledge of System Verilog (SV)/Verilog RTL coding
• Working experience in building simulation workflows using Makefile/shell scripts/python
• Develop own physical design implementation of multi hierarchy low power designs including physical aware logic synthesis, design for testability, static timing analysis, power analysis, IR Drop, EM, in advanced technology nodes
• Resolve power issues related to physical design, identify potential low power solutions, drive execution and methodology improvements
• Perform comprehensive power analysis in vector and vector-less modes of ASIC SoC design

Your Experience

Accenture Analysts are forward-thinking, well-rounded people with a record of outstanding academic performance and high learning agility. We’re looking for individuals who can work in an open and entrepreneurial way.

Internship program is full-time and starts on June 3rd and runs through August 15th, 2025.

The work location for this role requires working onsite with our clients and partners or in our offices and delivery centers to enable delivery and cultivate our client relationships.

Please note that with all of our roles, you should expect to be in-person for collaboration, learning and building relationships with clients, peers, leaders and communities.

#LI-DNI  

#IND-DNI  

Qualification

Here’s what you need:

• Bachelor’s or Master’s Degree in Electrical Engineering or related field
• Anticipated graduation date (at the time of application) of December 2025 through August 2026

Bonus points if you:

Experience with the following through course work, project work or work experience:

• VLSI (Very Large-Scale Implementations)
• Hardware Design languages and Programing Logic
• Analog and Digital Circuits
• Digital Systems and Circuits
• Real-time Digital Signal Processing (DSP) Systems
• Quantum Mechanics for Engineers

Compensation at Accenture varies depending on a wide array of factors, which may include but are not limited to the specific office location, role, skill set, and level of experience. As required by local law, Accenture provides a reasonable range of compensation for roles that may be hired in California, Colorado, District of Columbia, Illinois, Maryland, Minnesota, New York or Washington as set forth below.

We accept applications on an on-going basis and there is no fixed deadline to apply.

Information on benefits is here.

Role Location                                Hourly Salary Range

California                                          $21.97 to $66.63

Colorado                                           $21.97 to $57.60

District of Columbia                      $23.37 to $61.30

Illinois                                               $20.34 to $57.60

Minnesota                                        $21.97 to $57.60

Maryland                                          $20.34 to $53.32

New York                                          $20.34 to $66.63

Washington                                      $23.37 to $61.30

Locations

Scottsdale, AZ

Additional Information

Requesting an Accommodation

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If you would like to be considered for employment opportunities with Accenture and have accommodation needs such as for a disability or religious observance, please call us toll free at 1 (877) 889-9009 or send us an email or speak with your recruiter.

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We believe that no one should be discriminated against because of their differences. All employment decisions shall be made without regard to age, race, creed, color, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law. Our rich diversity makes us more innovative, more competitive, and more creative, which helps us better serve our clients and our communities.

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